Computer language translator



R. B. BONNEY ETAL 3,321,609

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INVNTORS ROBERT B. BONNEY BY CHARLES R. SUBLETT l AGENT mme May 23, 1957' R. B. BoNNEY ETAL 3,321,609

COMPUTER LANGUAGE TRANSLATOR 17 Sheets-Sheet l '7 Filed Deo.

United States Patent 3,321,609 .COMPUTER LANGUAGE TRANSLATOR Robert B. Bonney and Charles R. Sublctt, Tustin, Calif., assignoi's to Electronic Engineering Co. of (.Ialifornia, Santa Ana, Calif., a corporation of California Filed Dec, 5, 1953, Ser. No. 778,396 Claims. (Cl. 23S- 154) Our invention relates to data processing and particularly to a relatively universal means for translating digital data from one format to another in order that the format requirements of a desired electronic computer may be met. t

With the growth of the electronic computer industry has come a disturbing increase in the number of formats according to which data are processed. Unless data are presented to a particular electronic computer in the exact format intenedd for use in that computer the computer will not operate upon the data.

Obviously, a device for formatizing original or raw data and for changing the format of data prepared for 0r derived from one type of electronic computer to the format for another type of computer is needed. Thus far, these needs have been recognized with respect to particular formatizing or translational jobs. Format control buifers, as these may be called, have been built for a particular job and they are useful in performing that job. However, such devices are invariably impotent for performing another fonnatizing or translational job and so the user of computers has been faced with acquiring a relatively large number of such buffers or else remain impotent to process certain data formats.

The need for a universal computer language translator has not gone unfilled because those skilled in the art have not been aware of the need for such a device, but because a way of supplying this need has been obscure.

Having been repeatedly faced with this problem we began to see a pattern of functions required for nearly all translational work and for accomplishing such Work we evolved a correlated grouping or particular apparatus having relatively universal application. This particular grouping we have called a universal format control. To this we added an input control and read electronics for reproducing the initial data in the form of electrical pulses for format translation by the universal format control entity. We also added an output control and Write electronics which took the translated electrical pulses and arranged for recording the same on a desired medium.

and manual keyboards. Incidental to the output control are such items of apparatus as tape units, card punches, paper tape punches, line printers and/or plotters.

Accordingly, assuming any computer center having certain of the incidental items of being carried on, by the partic- When this is done we achieve a very greatly increased capability of translation with less apparatus than is the case where relatively individual format control buffers of the prior art are constructed and employed. i

Briefly describing our invention, initial data are irnpressed upon the system by electrical reproduction from a magnetic tape reproducer, punched card reader, analog to digital converter, telemetered test information, etc., etc. An input control -unit and read electronics entity suited to the specic type or the general class of input apparatus involved is provided. This is interconnected to the data source and to the central universal format control. The input united apparatus has an input data register for handling digital data over seven parallel channels, for example. It also controls largely ministerial functions, such as start, stop, end of data recognition, data clock, end of block, end of file, end of tape, rewind, error, etc.

The central universal format control has a static memory as an important component. In addition there are controls and circuits auxiliary to the memory, parity check circuits, special character recognition circuits, special character generators, preset block counters, a preset tile counter, a clock generator, a parity generator, a word length counter, block length counter, a patchboard and a control panel. A word converter and/or a character converter are auxiliaries to this format control for the purpose of rearranging digital data comprising words and characters.

The output of our translator is formulated under the control of and by means of an ouput control and write electronics entity. This includes an output register, unload cycle control circuit, word converter control circuit, a ring counter, special character generator and detector, an error detector, and other devices and elements of ministerial. characte In use, the translator is set up to accept and reproduce data according .to the format in which it occurs, the format desired is arranged by suitable connection of the universal format control assisted by suitable use of the patchboard mentioned, and output writing provided for by setting up the physical apparatus to handle the desired medium and by providing appropriate output control instrumentalities.

An object of our invention is to provide a means for translating any ofrplural formats of data from one to another With minimum apparatus.

Another object is to rearrange the characters in a digital word in order to change from one format to another.

Another object isto rearrange the data bits in a char-V acter in order to change from one format to another.

'Another object is to recognize, generate or delete special character bits or parity bits in format translation.

Another object is to unitize apparatus for format translationrsuch that the exibility of such apparatus for that purpose 1s a maximum.

Other objects will become apparent, upon reading the following detailed'specication and upon examining the accompanying drawings, in which are set forth by way of illustration and example certain embodiments of our invention.

FIG. 1 shows the general block diagram of our translator,

FIG. 2 shows a diagram ofthe central universal format' FIG. 5 shows a diagram of our translator arranged to change the format of data on magnetic tape and to record e same on other tape,

FIG. 6 shows our translator arranged to change the format of data from magnetic tape and record the same on punched cards,

FIG. 7 shows our translator arranged to change the format of Idata from punched cards and record the same on magnetic tape.

FIG. 1 shows our whole computer language translator arranged to takel digital information from a magnetic tape source, to change the format of that information, and to record the translated information on another mag- It is a schematic figure in that the electrical Patented May 23, 1967 connections within the central universal format control are illustrated by dotted lines. Such connections are uniquely determined for any set of specific conditions by pre-wired program patchboards, the suitable one of which is merely plugged into the patchboard jack bay and' by possibly making other circuit connections between the apparatus elements.

It will be recognized that the interconnecting wires shown in the .figures of the drawings represent one typical set of connections to and from the patchboard jack bay through a pre-wired program board.

In FIG. l numeral 1 indicates the input tape unit. This is a known IBM 727 or equivalent computer magnetic tape device. From this, digital data passes over seven parallel path conductors collectively labelled 2 to input control unit and read electronics entity 3. An end of tape signal also arises from tape unit 1 and is conveyed to input entity 3 over conductor 4. Control of forward tape transport motion arises in input entity 3 and goes to unit 1 over conductor 5, as does the control of reverse motion over conductor 6 and rewind tape over conductor 7.

After passing through an input register and auxiliary devices the data pass to the central universal format control 8 over seven conductors 9. In a similar manner, end-of-block information passes from input entity 3 to control 8 over conductor 10, end-of-file information over conductor 11, end-of-tape information over conductor 12, data clock information over conductor 13, and B error information over conductor 14.

Commands to clear the input entity register pass from control 8 to input entity 3 over conductor 15, to transport forward 16, to reverse over 17 and to rewind over 18.

Within the universal format control 8 are various apparatus elements selected and composed for universality of application, such as mixer 20 having data mixing gates, plural special character generators 21, preset block counters 22, a preset file counter 23, a magnetic core memory 24, a clock generator 25, special character recognition circuits 26, special character generation circuits 27, a word length counter 28, a block length counter 29, a parity generator 30, A parity check circuits 31, C parity check circuits 32, a program patchboard 33 and a control panel 34.

IBM and certain other computer tapes are organized on the basis of tiles, where a.- le may be a complete report listing, or other group of associated data. The preset tile counter keeps track of the number of files that have been processed by the translator. This is a preset counter which can be preset to process any de-v sired number of files by the translator.

Special characters are used by various computers for control processes. Typical characters are end-of-word, end-of-block, end-of-fle and blank. The number of special characters and their definition varies from computer to computer.

Data on computer magnetic tapes are ordinarily written in blocks with a length of blank tape interspersed between blocks. This is to allow a blank area for starting or stopping the tape. In our translator, the block length counter normally operates during the writing cycle and keeps track of the number of characters which have been written onto the output tape. When the end of the block has been reached, the block length counter delivers a control signal to stop the output tape unit.

Certain typical internal connections between these elements are indicated by dotted lines within the central control 8. These are not complete but are illustrative, particularly. as to program patchboard 33 and control panel 34, since connections from these elements pass to substantially every other unit.

Other controls, initially entering particularly the control panel, are the Vstop conversion control 35, start readin cycle 36, recycle 37, linear counter inputs 38, linear counter reset 39, the write cycle inhibitor set 40 and reset 41, start write cycle 42, error break A 43, error break B 44 and error break C 45, memory clear control 46, and l2 parity generator inputs 47. Other outputs from central control 8 are end of linear count 48, odd parity 49, and even parity 50.

The linear counter is a general purpose counter, which we have also referred to as a ring counter in FIG. 4. There are as many counter elements as the full-scale count capacity. In the embodiment of FIG. 4 this is a twelve stage counter employing twelve flip-flops as is evidenced by the 12 address lines emerging from counter 110. With the counter reset, each input advances the count from one flip-flop to the next, as is understood from first principles. The output from the counter stages, via the connections shown, is used to turn other equipment on and otf and to otherwise control and time the operation of various parts of the system. A typical use is to generate output words having a fixed number of characters. In this case the linear counter determines the number of characters that are read out of the memory. However, our counter has been constituted to operate in several different modes, in application, depending upon the logic of the connections to and from the counter. This allows it to be used for several dilferent functions during the translation operation. Note the connection of l2 lines to the patchboard F.B. 115.

In certain conversions, such as IBM 705 tapesV to Univac I tapes, rearrangement of a character or content of a word is required. For this, character converter 52 and/or word converter 53 are required. These entities normally function with recirculation of the information through memory 24. To accomplish this eight parallel digital data lines pass out of and return to the control 8 via conductors 54 and 55, respectively. `Other coacting controls pass between these entities, such as clock rates via conductor 56 from control 8 to word converter 53, test mode control 57, and twelve linear counter outputs 58, similarly. From word converter 53 to control 8 goes load synchronization via conductor 59. The start word conversion cycle requires at least one conductor 60 in each direction.

In a manner similar to input entity 3, output control unit and write electronics 62 is connected to control 8 and to an output tape unit 63. The digital data pass from the control to entity 62 by means of seven conductors 64 and on to tape unit 63 by seven conductors 65. From control 8 to entity 62 there also proceeds write synchronization information via conductor 66, end-ofblock information via conductor 67, write end-of-le information via conductor 68, start write cycle information via conductor 69, stop write cycle information via conductor 70, and clear the output entity information via conductor 71. From the output entity 62 arises the write tape command which passes to control 8 via conductor 72. End-of-tape information originates at output tape unit 63 and is conveyed from there to output entity 62 via conductor 73 and therefrom to control 8 via conductor 74.

Forward, reverse and rewind commands from output entity 62 reach the output tape unit 63 via conductors 75, 76, 77, respectively.

-In reading magnetic tapes into our translator, an endof-block signal is detected when the end of a particular block of data is received. The signal generated by the end of the block is entered into our translator for control purposes. In writing output tapes an end-of-block command is delivered to the output tape unit when the end of a block of data is reached. This end of block signal is used to control the output tape unit.

-Write end-of-file is an operational command used in writing output tapes. The initiation of this command causes a unique end-of-iile pattern to be written onto the output tape. In some cases the end-of-ile is an extra long inter-block blank space. In others, it is a specific code rquirements of usual applications.

symbol. At times a combination of both of these indicia are employed.

In FIG. 2 the elements of universal format control 8 are grouped in functional order. This order sets the pattern for still further detail of this control in succeeding gures.

In FIG. 2 all the input conductors 9 through 18 of FIG. 1, save and 11, enter a data input and translator control entity 80. The contents thereof is detailed in FIG. 3 to follow. The end-ofblock information, conductor 10, enters block counter 81 in FIG. 2. An output 'at the end of each block passes from element 81 to the compressed block and file counters entity 82. An output at the end of N blocks passes from element 81 to entity 80. The end-of-le information, conductor 11, enters compressed block and file counters 82 and therefrom goes end-of-compressed-block information and separately end-of-Niiles information to data input and translator control 80.

The term end of N blocks refers to a control signal which occurs when a preset number (that is, a selected number N) of data blocks have been entered into the translator system. This signal is generated by counter 22 in FIG. 1.

The term end-of-Nfiles refers to a control signal which occurs when a preset number (i.e., N) of files have been entered into the translator system. This signal is generated by counter 23 in FIG. 1.

From entity 80 goes digital data over eight parallel conductors to memory auxiliary 83. Another conductor also passes load synchronization from entity 80 to auxiliary 83. Data and control information goes to and returns from memory storage unit 84 from auxiliary 83. The memory storage unit may have a capacity of 1092 or 2184 characters, for example, depending upon the re- The larger memory is preferred when the group of data characters to be stored is large.

From auxiliary 83 previously stored digital data go over 8 conductors to data output assembly 85, which assembly is detailed in FIG. 4 to follow. A clock signal also goes from auxiliary 83 to output assembly 85, and a start unload cycle command from input control 80 to output assembly 85. From output assembly 85 goes a recycle command to input control 80, also error information, and unload synchronization from S5 to auxiliary 83. Also from output assembly goes end-of-word information to preset word counter 86 and end-of-block information from that counter returns to output assembly 85.

From output asembly 85 go most of the data to the output control and write electronics 62 of FIG. 1. This includes digital data over seven parallel conductors 64, write synchronization via 66, start write cycle via 69, stop write cycle via 70 and parity bit information via conductor 87. End-of-block information passes from preset word counter 86 to entity 62 via conductor 67. From entity 62 comes write command information to output asasmbly 85 via conductor 72 and also end-of-data information via conductor 74.

Where word conversion is required the digital data are recirculated through memory auxiliary 83 and storage 84 in the following manner. From data output at 64 of the data output assembly 85 a duplicate seven conductor group takes the digital information to word converter 53. Also from output assembly 85 goes end-of-data, read-n, read-out and address controls. From word converter 53 start unload cycle information comes to output assembly 85. Also from word converter 53 comes load synchronization to memory auxiliary 83 and also therefrom to data input translator control 80 digital data over 8 parallel conductors. From entity 80 to word converter 53 goes start unload cycle information.

The detailed composition of each of the block elements is now given.

Block counter 81, FIG. 2, is composed of four preset decade-counter plug-in units and a block control plug-in unit. yEach such counter unit may be a type Y-102 flip-op described with schematic circuit in Catalog 856 (published in Aug. 1956) of the Engineered Electronics Co., 1441 E. Chestnut Ave., Santa Ana, Calif. These counter units may be connected according to the FIGS. 3-4, page 18, of the reference book, High-Speed Computing Devices, first edition, edited by W. W. Stier, Ir. (ERA), McGraw-Hill Book Company, Inc., New York, 1950. The labelled Input connection of the device of FIGS. 3-4 in the book connects to wire 10 of FIG. 2 of these drawings and the Output to adjacent blocks and 82 via the wires with arrows shown in FIG. 2 of these drawings. block pulses from input control unit 3, FIG. 1, (Via wire 10, FIG. 2) when the input transport is operating in either the forward or the reverse direction. The end-ofblock pulses are gated by the forward-reverse control signals from data input and translator control 80 by and gates located in the block counter control unit. These may be the Y-417 type described in the above-referenced Catalog 856 and constitute the block counter control unit. The end-of-block pulses are then applied to the units decade of a thousands, hundreds, tens, units preset counter.

Each of these counter units contains a decade counter tube, a switch for selecting the desired preset count and two one-shots which trigger the decade counter tube. When counting in the forward direction, the gated end-ofblock pulses from the block counter control trigger a one-shot. The resulting positive pulse is inverted by a driver which applies a negative pulse to the counter tube. After 20 microseconds the rst one-shot triggers the second one-shot and the counter tube is triggered. TWo stepping signals applied to the counter tube result in shifting conduction to the next cathode in sequence. When counting in the reverse direction the second one-shot is triggered by the end-of-block pulses and the counting action is reversed.

When all the counter stages produce count out signals; i.e., when the preset count is accumulated, the block control delivers afnegative pulse to data input and control 80 and this represents the end-ofN-blocks of input data.

A block counter reset signal is received from entity 86 when a corresponding manual push-button is depressed. Thereafter the second one-shot inhibits an output gate for a number of milliseconds to prevent transient outputs.

The compressed block and file counters 82 contains two separate counter units; the compressed block counter and the le counter. Each counter is composed of two preset decade-counter plug-in units and related control circuits. Both counters operate in a manner similar to that described for block counter 81 and contain the same elements.

The compressed block and file counters are of the preset type and are used to allow a selected number of input blocks or les to 'be compressed and written out as a single long lblock or tile. As an example, the compressed block counter can be used to accept input magnetic tapes written in card-size blocks of 8O characters and to produce an output block `of 960 characters by combining the data from 12 input cards into a single block.

The le counter operates in either the forward or the reverse direction. It counts the end-of-le pulses applied from input control unit 3 via conductor 11. Two decade counter units are preset to respective lunits and tens digits for the desired number of files to be processed.

The compressed block counter operates in the forward direction only. The end-of-block pulses are introduced from the block counter 81 via the connection between blocks 81 and 82 shown in FIG. 2, and thus are present only when the input transport is operating in the forward direction. The compressed block counter differs from The block counter counts the end-0f-v 

1. IN AN ALTERABLE CONVERTING MEANS FOR SELECTIVELY CONVERTING ANY ONE OF PLURAL DIGITAL CODES FROM ONE TO THE OTHER INDEPENDENT OF AN ELECTRONIC COMPUTER ELECTRICAL APPARATUS COMPRISING: A FIRST MEANS TO ACCEPT MAGNETICALLY REPRODUCED DIGITAL INFORMATION IN THE FORM OF ELECTRICAL ENERGY LEVELS; A STATIC CORE MATRIX MEMORY TO STORE IN EXCESS OF FIVE WORDS OF DIGITAL INFORMATION; AN ELECTRONIC LOAD ELEMENT HAVING PLURAL LOGIC AND GATING CIRCUITS TO SERIALLY LOAD SAID MEMORY; AN ELECTRONIC UNLOAD ELEMENT HAVING PLURAL LOGIC AND GATING CIRCUITS TO SERIALLY UNLOAD SAID MEMORY; INTERCONNECTING MEANS COMPRISING A PATCHBOARD AND ANY ONE OF A PLURALITY OF PREWIRED PROGRAM BOARDS CONNECTABLE SINGLY THEREWITH, SAID PATCHBOARD HAVING A PLURALITY OF TERMINALS, WHEREIN ELECTRICAL CONNECTIONS COMING INTO CERTAIN TERMINALS OF SAID PATCHBOARD PROCEED THROUGH THE WIRING OF SAID PROGRAM BOARD AND OUT THROUGH OTHER OF SAID TERMINALS OF SAID PATCHBOARD; SAID FIRST MEANS, STATIC CORE MATRIX MEMORY, ELECTRONIC LOAD ELEMENT, ELECTRONIC UNLOAD ELEMENT, LOGIC AND GATING CIRCUITS OF THE LOAD AND UNLOAD ELEMENTS CONNECTED RESPECTIVELY TO SAID PATCHBOARD; SAID INTERCONNECTING MEANS CONNECTING SAID FIRST MEANS OUTPUT TO SAID ELECTRONIC LOAD ELEMENT INPUT, SAID LOGIC CIRCUITS AND SAID GATING CIRCUITS IN SAID LOAD ELEMENT, SAID ELECTRONIC LOAD ELEMENT OUTPUT TO SAID STATIC MATRIX MEMORY INPUT, AND SAID STATIC MATRIX 